TL;DR
High Bandwidth Memory has become the main pressure point in the 2026 memory crunch, according to Thorsten Meyer AI’s second installment in its memory squeeze series. The report says HBM now absorbs far more wafer capacity than standard DDR5, is sold out through 2026, and is affecting both DRAM pricing and some graphics card supply.
High Bandwidth Memory has become the central pressure point in the 2026 memory crunch, according to Thorsten Meyer AI, as AI chip demand redirects scarce DRAM wafer capacity toward stacked memory used in accelerators and away from more common PC and server memory products.
The report says HBM, once a niche specialty part, now helps set the price and availability of much of the world’s memory. It attributes the shift to AI accelerators, which depend on HBM stacks placed next to GPUs to feed them data at far higher bandwidth than standard graphics memory can provide.
According to the source material, a modern AI GPU uses around eight HBM stacks, each built from 8 to 16 vertically stacked DRAM dies connected through through-silicon vias. That construction gives HBM roughly 5 to 10 times the bandwidth of normal graphics memory, but it also consumes far more manufacturing capacity.
The report cites estimates that one HBM bit uses about three to four times the wafer area of a DDR5 bit. It also says defects are more costly because a failure in one layer can spoil an entire stack. That means wafer allocation decisions by Samsung, SK Hynix and Micron can quickly tighten supply for ordinary DRAM when fabs prioritize HBM.
HBM ate the fab
The thing the factories make instead of your RAM is a tower of stacked memory bolted to every AI chip. In three years it went from niche part to the component that sets the price of nearly all the world’s memory — and now a chunk of its GPUs.
A tower, not a sheet
HBM stacks DRAM dies vertically, links them with thousands of through-silicon vias, and sits beside the GPU to deliver 5–10× the bandwidth of normal graphics memory. AI is bandwidth-bound — without it, the world’s most expensive silicon sits starved for data. But stacking is inefficient: one HBM bit eats 3–4× the wafer area of DDR5, and one defect can ruin a whole tower.
≈ 8 HBM stacks wrap every AI GPUThis isn’t artificial scarcity — AI really is bandwidth-bound, HBM really is the fix, and it really does eat 3–4× its weight in fab capacity. The discomfort is structural: one component, coupled to one customer’s demand, now sets the price of nearly all memory and a slice of GPUs. The market is now $35B → ~$100B by 2028, ~41% of all DRAM revenue (was 8% in 2023), and sold out through 2026. The one hope: with all three suppliers finally racing on HBM4, competition can add supply. The matching risk: if AI demand corrects, HBM is where it breaks first. Next: DDR5 now, DDR6 soon.
AI Memory Demand Reprices DRAM
The immediate impact for readers is that the AI accelerator boom is no longer isolated from consumer and enterprise memory markets. If more wafers go into HBM3E and HBM4, fewer are available for DDR5, graphics memory and other DRAM products that affect PCs, servers and graphics cards.
Thorsten Meyer AI frames the pressure as structural rather than artificial scarcity. The report says AI workloads are genuinely bandwidth-bound, HBM is the practical fix, and suppliers have strong financial reasons to favor it. It estimates stack prices at about $200 for HBM3, roughly $300 for HBM3E, and about $500 for HBM4, while noting that per-stack pricing is estimated and point-in-time.
The report also says the HBM market is moving from about $35 billion toward roughly $100 billion by 2028, and could account for about 41% of DRAM revenue, up from 8% in 2023. Those figures matter because they explain why memory makers are reallocating capacity even as buyers of standard memory face higher prices or tighter availability.
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From H100 To Rubin
HBM’s rise has tracked the recent AI accelerator cycle. The report identifies HBM3 with the Nvidia H100 era, HBM3E with chips such as H200 and B200, and HBM4 with Nvidia’s planned Rubin platform. It lists bandwidth per stack at around 819 GB/s for HBM3, about 1.18 TB/s for HBM3E, and an estimated 2.8 TB/s for HBM4.
The supplier race is concentrated among SK Hynix, Samsung and Micron. The source material says SK Hynix remains the leader with roughly 50% to 62% share and that about 90% of its HBM goes to Nvidia. It places Samsung at about 28% to 40% and Micron at roughly 5% to 10%.
By June 2026, according to the report, all three major suppliers had qualified for HBM4. That shifts the competitive question from whether suppliers can produce the part to which supplier can ship the most capable and reliable stacks at scale.
“The thing the factories make instead of your RAM is a tower of stacked memory bolted to every AI chip.”
— Thorsten Meyer AI
HBM stacked memory modules
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GPU Supply Claims Need Confirmation
Some details remain unsettled. The source material says consumer GPU supply has also been affected because suppliers prioritized HBM, tightening availability of GDDR7 used in graphics cards. It also says Nvidia reportedly cut RTX 50-series production by a third or more in the first half of 2026, but that point is presented as a report rather than a confirmed company disclosure.
It is also not yet clear how much HBM4 competition will relieve supply pressure in 2026, or how quickly added capacity can reach buyers outside the largest AI accelerator customers. The report names Silicon Analysts, Introl, TrendForce, DigiTimes, Unibetter, Astute Group and Reuters as sources, while noting that pricing and market-share figures are estimates in a fast-moving market.
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HBM4 Race Sets Next Prices
The next milestone is the HBM4 ramp. If Samsung, SK Hynix and Micron all increase qualified output, competition could add supply and ease some pressure on broader DRAM markets. If AI accelerator demand keeps absorbing new capacity, buyers may continue to face tight supply and higher prices across DDR5, server memory and some graphics-card components.
The source series says its next installment will examine DDR5 now and DDR6 soon, which should show how the HBM squeeze is feeding into mainstream memory pricing and product availability.
high bandwidth memory DRAM
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Key Questions
What is the main development in this report?
HBM demand has become a central driver of the 2026 memory crunch, according to Thorsten Meyer AI, because AI accelerator production is absorbing wafer capacity that could otherwise support standard DRAM products.
Why does HBM use so much fab capacity?
HBM stacks multiple DRAM dies vertically and connects them through microscopic channels. The report says this design uses about three to four times the wafer area per bit compared with DDR5 and has more yield risk.
Which companies dominate HBM supply?
The report names SK Hynix, Samsung and Micron as the three major suppliers, with SK Hynix described as the current leader and all three said to have qualified for HBM4 by June 2026.
Is this affecting gaming graphics cards?
The source material says GDDR7 supply for consumer cards has tightened as suppliers prioritize HBM. It also says Nvidia reportedly cut RTX 50-series production in early 2026, but that remains attributed reporting rather than confirmed company guidance in the provided material.
What could ease the memory squeeze?
A broader HBM4 supply ramp from all three suppliers could add capacity. The unresolved question is whether new output can grow faster than AI accelerator demand.
Source: Thorsten Meyer AI
